FAIRCHILD

Fairchild Packaging - Top Mark Search




Top Mark Definition

  • Top mark refers to the device identification mark found on Fairchild semiconductor packages
  • Top mark is used for determining whether a product is genuine and whether it matches your order
  • Certain top marks refer to manufacturing date and assembly plant, and their values are dynamic
  • This search tool uses symbols, e.g. &Y, to stand for dynamic top marks
  • In search results, static marks are displayed in plain text, while dynamic marks are displayed in bold font with short descriptive text in parenthesis as link to help webpage
  • Please check symbol list below for more details on dynamic top marks
Top Mark Record Example:
(Please click on the text link beside each symbol for details)

SOT-23 Layout Line 1: &Y(Binary Year)
Line 2: &O(Plant Code)1234&C(Die Run)
Line 3: &.(Pin One)&O(Plant Code)&E(Space)&V(Binary Week)

SMA/SMB/SMC Products
SMA/SMB/SMC Layout Line 1: $Y(Logo) &Z(Assembly Plant) &3(Date Code)
Line 2: SMD

Top Mark Convention Symbol List
(please click on each symbol to see more details)
Symbol Format Description
$Y FS or Fairchild Semiconductor (FSC) logo graphic
&Z Z Designates the Assembly plant code
&4 XXYY 4-Digit Date code format
&3 XYY 3-Digit Date code format
&2 XY 2-Digit Date code format
&G YY Weekly Date code format
&T TT Die Run Traceability Code
&W ---- Six-Week Binary Datecoding Scheme
&V --- Eight-Week Binary Datecoding Scheme
&Y ---- Binary Calendar Year Coding Scheme
&C T Single digit Die Run Code (last digit of the two digit code)
&U U Wafer Fab Code
&E    Designates Space
&. . Pin one dot (For SC70, SOT23, MLP binary marking type and WLCSP)
&H Lot Number Last 3 digit of workstream lot number
&O Plant Code identifier on Tiny Logic Package
&K KK 2-Digits Lot Run Traceability Code